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Google Design Verification Engineer Silicon India, Karnataka, Bengaluru 54105651
26.06.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Computer Science or related technical field, or equivalent practical experience.
- 4 years of experience in Design Verification.
- Experience verifying digital logic at RTL using SystemVerilog and UVM for ASICs.
- Experience in verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Preferred qualifications:
- Experience creating and using verification components and environments in a standard verification methodology such as UVM
- Experience with GLS, low-power DV, and support of SOC DV.
- Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.
- Experience with performance verification of ASICs and ASIC components and experience with ASIC standard interfaces and memory system architecture.
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