Job DescriptionYour responsibilities may include but not be limited to:
- Performing physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
- Physical Synthesis, Floor planning, Place and Route, Clock Tree Synthesis with Synopsys and/or Cadence EDA tools.
- Multiple Power Domain analysis and handling using standard Power Formats UPF or CPF.
- Verification and Signoff including Formal Equivalence Verification, Static Timing Analysis, Reliability Verification, Static and Dynamic power integrity, Layout Verification, Electrical rule checking, Noise analysis and Structural Design checking.
- Analyzes results and makes recommendations to fix violations for current and future product architecture.
- Participating in the development and improvement of physical design methodologies and flow automation.
- Driving performance optimization, including co-optimization, work with process teams, to create best-in-class designs.
The ideal candidate should exhibit behavioral traits that indicate:
- Self-motivator with strong problem-solving skills.
- Excellent interpersonal skills, including written, verbal, and presentation communications.
- Attention to detail and organizational skills.
- Ability to work as part of a team and collaborate in a high-paced atmosphere.
QualificationsBS/BTech degree with 12 years of experience, or MS/MTech degree with 10 years of experience, in Electronics Computer Engineering, or a related field.
Preferred Qualifications:
- At least 10+ years of experience in physical design using industry EDA tools.
- Experience in Python/Perl/TCL programming languages