Job Description:About DASE:
About the Role:
The AI Architect role requires a deep understanding of AI SOC and system architecture encompassing both hardware and software. Individual is expected to lead team which will define future AI SOCs including GPU-based accelerators, making tradeoffs in functionality across GPU, memory, interfaces, and custom logic resulting in product that meets market demand and cost across all KPIs.Responsibilities:
- Leads the AI Architecture area, through subordinate engineering managers and top engineering professionals.
- Responsible for defining the architectural direction, driving innovation and overseeing the development of cutting-edge silicon technologies and products to meet evolving market demands.
- Applies deep technical expertise to provide overall technical and business guidance to Silicon Architecture Engineering teams.
- Oversees/directs managers who are accountable for team(s) of silicon architects (e.g., IP, SoC, domain architects) developing architecture specifications for highly optimized, modular, and scalable IPs or SoCs.
- Develops and oversees implementation of long-term vision and strategy of silicon architecture engineering in alignment with Intel's business objectives and market trends. Directs multiple teams in the optimization of the layout and organization of components to achieve performance, power efficiency and size objectives.
- Leads subordinate managers in cross-functional collaboration including research, design verification and manufacturing to ensure successful/effective development process outcomes.
- Allocates and provides oversight to balancing resources to meet goals of multiple projects, including achievement of, budget alignment, quality goals and timeline/roadmap parameters.
- Managesexecutive/senior-level
- Extensive experience in semiconductor design and architecture, with a proven track record of leadership in complex projects.
- Proven experience with managing multiple, simultaneous silicon architecture projects that includes applying strong business acumen resulting in the alignment of technical decisions with business objectives.
- Leadership of end-to-end semiconductor architecture design and implementation methodologies
- Deep technical expertise in multiple areas ofhardware/software/systemssilicon architecture.
- Wide exposure of Datacenter workloads, usage models and deployment models
- Deep Knowledge of multiple domains of the micro-processor architecture, datacenter product and system architecture
Qualifications:Minimum Qualifications:
- Master's or PhD degree in Computer/Electrical Engineering or equivalent
- 15+ years of Microprocessor architecture and design and multiple years of experience in large scale datacenter infrastructure deployment
- 10+ Leadinghardware/software/systemsarchitecture leadership roles in semiconductor design firm.
Preferred Qualifications:
- Ability to direct and lead highly technical and skilled teams
- Strong stakeholder management skills, self-motivated, persistent, and resilient with the ability to operate in face of ambiguity
- Works well with experts spanning Intel and the industry
- Excellent written and oral communication skills
Experienced HireShift 1 (United States of America)US, California, Santa Clara
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 01/29/2025