Intel GPU Senior Formal Verification Engineer United States, Texas 930358411
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This role will be primarily based in our Folsom Campus, and will be part of the Validation Center of Excellence driving verification and validation innovation , quality & efficiency.
Life at Intel link:
As a GPU Formal Verification Engineer, your responsibilities will include but are not limited to:
Conducts verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms.
Creates comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques.
Creates abstraction models for convergence on the design, carves out the right boundaries for the design, and tracks, verifies, and applies abstraction techniques.
Develops formal proofs to implement the verification plan, reviews the completed proofs, and develops new formal verification methodologies.
Performs convergence on design by creating formal verification methodology, abstraction, and simulation techniques.
Finds and implements corrective measures to resolve failing tests.
Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.
Understands the binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolves the BDD complexity on arithmetic. Applies understanding of modeling architecture to simplify and model the problem and uses tools to formally prove protocols and architectures.
The successful candidate should exhibit the following behavioral traits:
Good problem-solving skills, critical thinking, ability to communicate clearly on technical topics
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum skills and experience that will get you noticed:
Master’s/bachelor's degree in computer science, Comp Engineer, Electrical Engineer, Math, Logic or any related field
Candidate must have 5+ years of experience with the following:
RTL design or Formal Verification
FV tools like VCFormal or JasperGold
Knowledge of System Verilog, SVA, and Assertion-Based verification
Preferred skills and experience that will make you stand out:
Knowledge of 3D Graphics Pipeline and concepts
Hands-on Experience with Verification IP (VIP) development for > 3 years
Experience with EDA Verification IP development processes
Proficiency in scripting languages and utilities including Make Perl Python etc.
Benefits:
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:
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