Required/Minimum Qualifications:
- Being enrolled in a Master or PhD program of computer science, computer engineering, electrical and electronics engineering, or other related fields.
Other Requirements:
- Experience working on research projects related to digital hardware design
- Demonstrated experience in design and development cycle of FPGA- or ASIC- based hardware systems, i.e. from RTL coding to system-level testing and performance evaluation
- Thorough understanding of digital logic design concepts from system level to low level details
- Good RTL coding and debugging skills (Verilog/System Verilog preferred)
Preferred/Additional Qualifications:
- Experience with ML accelerators, memory controller, network physical layer or gigabits transceivers on modern FPGAs
- Experience with software programming (C/C++/Python)