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Intel Yield Analysis Engineer 
Taiwan, Taiwan Province, Hsinchu 
922477067

24.06.2024

Yield Analysis Engineers' responsibilities include (but are not limited to):

Own engineering projects involving large-scale data analysis and machine learning to support HVM yield roadmap, device targeting and attaining performance targets.

Formulate yield problems mathematically, identify solutions, and remove technical barriers to achieve successful solutions.

Provide yield analysis for various engineering projects to improve quality, performance and to reduce wafer cost.

Yield debugging at the product develop stage ( NPI yield analysis support )

Problem-solving technique with strong self-initiative and self-learning capabilities.

Must demonstrate solid communication skills.

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor's degree in science and engineering major.
  • 10+ years' experience in advanced node semiconductor industry in in yield analysis and data science. Level of experience will be considered in determining applicants job grade.
  • 5+ years' Experience in python and other program languages to develop a new analysis method and algorithms using large amount of fab data.
  • 5+ years' experience in big data analysis and machine learning.
  • 5+ years' experience in advanced node semiconductor high-volume manufacturing.
  • 10+ years' experience with Device Physics and overall FinFET process flow.
  • 10+ years’ experience in yield analysis for foundry customers

Preferred Qualifications

  • Advanced degree (Master's or Ph.D.) in science and engineering major.
  • Work experience in TFT environment.
  • Experience in serving external Foundry customers through technical interactions
  • Demonstrated interpersonal skills including influencing, engaging, and motivating.
  • Understanding on GAA (Gate-All-Around) technology architecture.
  • Yield debugging experience in GAA device
  • Experience in new semiconductor technology development.
  • Basic understanding on module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.