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Google Senior Multimedia Design Verification Engineer Silicon Taiwan, New Taipei 914619858
29.01.2025
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science, or related field, or equivalent practical experience.
- 10 years of industry experience in Design Verification.
- Experience leading a team completing the full functional verification and performance validation cycle of subsystems such as multimedia, communication, or processors, or at the SOC level.
- Experience constructing reusable verification components and environments using UVM.
Preferred qualifications:
- Experience with image processing or other multimedia IPs such as Display or Video Codec.
- Experience with System Verilog Assertions (SVA), assertion-based verification, and formal verification.
- Experience working with software teams to define hardware/software interfacing including control/status registers, security, and error handling.
- Experience working with RTL design and integration teams on methodologies that improve team productivity and velocity.
- Experience with Low Power Verification and power management flows.
- Experience with Zero Delay, SDF, and Power Aware GLS at block and SOC level.
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