Minimum Qualifications:The candidate must possess a minimum of bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.-0-2 years of relevant logic design/pre-silicon verification experience with multiple project cycles.-Advanced English level- Costa Rican unrestricted work permit.-0-2 years of logic design/pre-silicon verification experience with various tools and methodologies including but not limited to:System VerilogRTL simulatorsTestbench developmentWork experience with system Verilog or OVM or UVM or Object-Oriented Programming (OOP)VLSI or Structural and Physical design flow/methodology experience. Preferred Qualifications:RTL model buildPower-aware simulationCoverage-based random constraint simulationCapable in developing testplans, tests and verification environment based on High Level Architecture specifications.Power management, IOSF, AHB, PCI express or any industry standard BUS protocol experience a plusOVM / UVMScripting (Python/Perl/Shell)Interactive debuggerWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits