Intel IP Design Verification Engineer 

Bolivia, Santa Cruz, San José de Chiquitos 

893284498

Job Description

Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Must have strong orientation for Quality and Commit and Deliver and Drive Innovation/efficiencies and have strong strategic thinking to come up w/ paradigm shift solutions to critical design/validation challenges.

Behavioral traits:

- Strong analysis

- Debugging skills, and creative in problem solving.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

Bachelor's degree or advanced student in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.

-0-2 years of relevant logic design/pre-silicon verification experience with multiple project cycles.

-Advanced English level

- Costa Rican unrestricted work permit.

-0-2 years of logic design/pre-silicon verification experience with various tools and methodologies including but not limited to:

• - System Verilog

• - RTL simulators

• - Testbench development

• - Work experience with system Verilog or OVM or UVM or Object-Oriented Programming (OOP)

• - VLSI or Structural and Physical design flow/methodology experience.

- Advanced English level- Costa Rican unrestricted work permit

Preferred Qualifications:

-Master degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.

- 3+ years of experience on the following areas:

• RTL model build

• Power-aware simulation

• Coverage-based random constraint simulation

• Capable in developing testplans, tests and verification environment based on High Level Architecture specifications.

• Power management, IOSF, AHB, PCI express or any industry standard BUS protocol experience a plus

• OVM / UVM

• Scripting (Python/Perl/Shell)

• Interactive debugger

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits