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Google Senior CPU RTL Designer Taiwan, New Taipei 909881539
01.04.2024
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
- Experience with microprocessor architecture through coursework or industry experience.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science with 2 years of relevant experience, or PhD in Electrical Engineering or Computer Science.
- Experience with modern processor microarchitecture and related technologies and algorithms, through academic projects or industry experience.
- Knowledge of Programming languages such as C, C++, and Python.
- Knowledge of general purpose operating systems such as Linux or Android.
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