The point where experts and best companies meet
Cisco Senior ASIC Design Verification Engineer United States, California, San Jose 906437614
11.06.2025
Share
The application window is expected to close on June 27, 2025.
Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
This role requires being onsite in San Jose, CA 4+ days/week.
Your Impact
- Participate in the ASIC design verification for Cisco high-end switching products.
- Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
- Collaborate with the hardware, software designers, and vendors.
Minimum Qualifications:
- Bachelor's degree in electrical/computer science/computer engineering/related degree and 7+ years of related experience or Master's in electrical/computer science/computer engineering/related degree and 4+ years of related experience.
- Experience in System Verilog/UVM.
- Experience with ASIC design and verification processes, debugging, methodology, and tools.
- Experience in verifying blocks/clusters/full chip level for ASIC.
Preferred Qualifications:
- Post-silicon lab bring-up experience.
- Experience with Linux, C/C++, and/or Python/Perl.
- Experience in Networking.
- Experience with Formal verification.
These jobs might be a good fit
