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Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Innovative standard cell circuit designer who excels in collaboration with various stakeholders
Pathfinding of new logic technologies and creating library methodologies
Competitive PPA analysis and driving stdcell library/logic in high performance CPU PPA differentiation
Si validation of libraries with tracking yield, Vmin, power, and performance
Leading failure analysis and maintaining reliability specification up to date
Qualifications:
Knowledge in the digital CMOS circuit and layout designs
Experiences in process technologies or SOC P&R designs desired
Familiarity with foundry ecosystems desired
Excellent communication and interpersonal skills to lead internal and external teams
MS or Ph.D. or BS with experience in Electrical Engineering, Computer Science desired
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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