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What you will be doing:
Develop ASIC designs for Video IP, including micro-architecture, design coding, performance optimization, functional coverage definition, synthesis, power, timing, and area optimization, static checks, and support of physical design engineers through place and route.
Work with the architecture team to define feature additions and roadmap.
Work with the ASIC team to drive design methodology to continuously improve design quality and engineer efficiency, including leveraging best in class AI tools and techniques.
Collaborate with verification engineers, IP architects, and other ASIC design engineers to formalize product features support, performance, and microarchitecture
Participate in verification closure through coverage analysis, regression triage and debug
Debug failing tests and work with the architecture modeling team to determine proper expected design behavior.
Work with physical design engineers to drive timing, area, and power closure.
Integrate IP’s into full chip ensuring interface specifications are aligned and all full chip requirements are met.
What we need to see:
BS/MS Electrical or Computer Engineering (or equivalent experience)
8+ years of proven experience
Expertise in designing optimized, sophisticated IPs with Verilog and/or HLS
Knowledge of video, display, and camera designs is highly desired but not required
Programming and scripting experience with C and Python
Excellent written, verbal and technical communication skills
Demonstrate use of out-of-box thinking for creative solutions to highly tricky problems
You will also be eligible for equity and .
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