Intel IP Logic Design Engineer 

Bolivia, Santa Cruz, San José de Chiquitos 

875215161

Job Description

The responsibilities for this position will include but not limited to:

- Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.

- Participates in the definition of architecture and microarchitecture features of the block being designed.

- Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.

- Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.

- Supports SoC customers to ensure high-quality integration and verification of the IP block.

- Drives quality assurance compliance for smooth IPSoC handoff.

Must have strong orientation for Quality and Commit and Deliver and Drive Innovation/efficiencies and have strong strategic thinking to come up w/ paradigm shift solutions to critical design/validation challenges.Behavioral traits:Strong analysis, debugging skills, and creative in problem solving.

Behavioral traits:

Strong analysis, debugging skills, and creative in problem solving.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

- Bachelor's degree or advanced student in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.

- 0-2 years of relevant logic design/pre-silicon verification experience with multiple project cycles.

- Advanced English level

- Costa Rican unrestricted work permit.

- 0-2 years of logic design/pre-silicon verification experience with various tools and methodologies including but not limited to:

• System Verilog

• Scripting (Python/Perl/Shell)

• RTL simulators

• Interactive debugger

• RTL model build

• Work experience with system Verilog or OVM or UVM or Object-Oriented Programming (OOP)

• VLSI or Structural and Physical design flow/methodology experience.

• Power management, IOSF, AHB, PCI express or any industry standard BUS protocol experience a plus..

Preferred Qualifications:

- Master degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.

- 3 years of experienced in:

- Testbench development.

- Work experience with system Verilog or OVM or UVM or Object-Oriented Programming (OOP)Formal Equivalence.

- TestingRTL model buildPower-aware simulationCoverage-based random constraint simulation

- Capable in developing testplans, tests and verification environment based on High Level Architecture specifications.

- Power management, IOSF, AHB, PCI express or any industry standard BUS protocol experience a plusOVM / UVMScripting (Python/Perl/Shell)

- Interactive debugger

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits