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Microsoft Fabric IP Design Engineer 
United States, North Carolina, Raleigh 
867517430

20.11.2024


We fundamentally believe that we need a culture founded in a growth mindset. It starts with a belief that everyone can grow and develop; that potential is nurtured, not pre-determined; and that anyone can change their mindset.





Required Qualifications:

  • 5+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience or internship experience.
  • Knowledge of the logic design flow including RTL coding, RTL simulation, synthesis, timing constraints, timing closure.

Other Requirements:

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications:

  • Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting, etc).
  • Experience in Computer Architecture, Digital Design, CPU/SoC design principles as part ofCentral Processing Unit(CPU), SoC and/or IP development.
  • Demonstrated experience and knowledge of design clock crossings and power/Unified Power Format(UPF).
  • Ability to write scripts using Perl, Tcl, Python etc.
  • Experience in building and integrating any of the IPs such as protocol bridges,Peripheral Component Interconnect Express(PCIe), cache controllers, memory controllers and Double Data Rate(DDR), security engines.
  • Experience in building functional fabrics using Coherent and Non-Coherent protocols.
  • Familiarity with Industry standard interface protocols such asAdvanced eXtensible Interface(AXI) orCoherent Hub Interface(CHI).
  • Familiarity with Synthesis andStatic Timing Analysis(STA) tools.
  • Good verbal and written communication skills.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until November 21, 2024.

Responsibilities

The Cloud Compute Development Organization is seeking a
Fabric IP Design Engineerto join our IP development team covering micro-architecture implementation, RTL Coding, IP integration, Circuit Design and design quality assurance, for our projects.  This team will be involved in numerous projects within Microsoft developing custom silicon for a diverse set of systems.  We are responsible for delivering cutting-edge, custom Intellectual Property(IP) designs that can perform complex and high-performance functions in the most efficient manner for a number of System on Chip(SoCs).  In this role, you will:

  • Be part of a design team developing advanced components of the memory sub-system.
  • Own multiple blocks within a complex, coherent fabric and bridge IP.
  • Be responsible for all aspects of the design flow includingRegister Transfer Level(RTL) coding, Lint,Clock Domain Crossing(CDC), timing closure, etc.
  • Collaborate with team members to define interfaces and make optimal design choices.
  • Work with the verification teams to develop test plans and ensure functional correctness.
  • Interface with performance modeling, physical design, design for test, and other teams to optimize tradeoffs.
  • Other
    • Embody our and