In this role, you will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO) with best in class power, performance, and area (PPA). You will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modelling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these sophisticated IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.