Broadcom Emulation Silicon Validation Engineer 

United States, California, San Jose 

82933234

• Conduct detailed studies of chip architecture and micro-architecture to define, develop, and execute comprehensive test plans that thoroughly validate switch features in both emulation phase and post-silicon

• Develop system-level tests usingTcl, ITcl, Python, C/C++to verify networking switch chips and systems.

• Synthesize Verilog RTL and build models for emulation platforms such asZebuorPalladium.

• Debugging Expertise:Perform chip/system-level debugging and root cause analysis for hardware and software issues, effectively addressing Pre/Post Silicon issues and challenges.

• Automation and Methodology:Develop and optimize automation scripts and emulation methodologies to enhance efficiency, reusability, and value.

• Reusable Components:Create reusable synthesizable design blocks, libraries, and verification components to streamline emulation processes.

• Silicon Bring-up:Plan, organize, and execute silicon bring-up and test plans

• Environment Management:Create and maintain robust emulation and post-silicon validation environments, supporting a global user community.

• Cross-functional Collaboration:

• Experience withC/C++ DPI Transactors,SystemVerilog assertions, and coverage metrics.

• Proven ability to design and develop synthesizable models for emulation.

• Hands-on experience withIXIA/Spirent traffic generatorsfor networking validation.

• Strong understanding of networking protocols and RFC test suites.

• Familiarity withcommunication/interfaceprotocols like PCIe, SPI, and JTAG.

Bachelor's + 8+ years of related experience required

Compensation and Benefits

The annual base salary range for this position is $119,000 - $190,000

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.