Nvidia Senior Mask Layout Design Engineer 

Taiwan, Taiwan Province, Hsinchu 

819149922

What you'll be doing:

• Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools.

• You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

• Job duties will include floor planning, custom layout and verifying against design rules and schematics.

What we need to see:

• BSEE or equivalent experience

• Minimum of 5+ years of relevant mask design / layout experience

• Deep understanding of analog circuit layout concepts in submicron CMOS technologies; You are an expert with Cadence custom circuit design tools - particularly virtuoso.

• Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield

• You are able to communicate in spoken and written English. Work effectively in a team, good communication skills, enthusiasm and positive energy.

• Proficiency in scripting languages like perl, python, skill, etc. ;

• Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decks.