Nvidia Physical Design Signoff CAD Engineer 

Israel, North District 

813428766

What you'll be doing:

• You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.
• Work closely with block owners, full Chip STA engineers to assure high quality and timely convergence.
• Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.
• Additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects.

What we need to see:

• B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).
• Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.
• Ownership, self-learning skills, and ability to work autonomously

Ways to stand out from the crowd:

• Experience in Signoff domains: STA (PrimeTime), Power Estimation (PrimePower), Power Integrity (RedHawk), Formal eq. (Formality)
• Knowledge in Tcl/Perl/Python
• Versatile
• Great teammate