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Key job responsibilities
- Define architecture specifications based on requirements from product teams- Create microarchitecture specifications suitable for being implemented by junior engineers- Evaluate 3rd party IP blocks- Estimate power, performance, and area for significant IPs early in design cycle- Execute on design specifications to deliver high quality RTL- Ensure quality by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT, UPF), Power Analysis and STA
- Bachelor's degree in Electrical Engineering or a related field
- Experience building complex UVM components, traffic generators and scoreboards
- Experience in architecting and building block, cluster and system level testbenches
- System Verilog experience and senior level debug skills.
- Experience in leading full chip or complex IP development from architecture through T/O
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Experience with formal verification techniques including abstraction and end-to-end checking
- Extensive experience in digital design
- Experience with physical implementation flows
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