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Innovators will be delighted with our integrated verification/validation environment that is used to perform architectural modeling to post-silicon validation. The team works backwards from customer requirements to build super-low power, energy efficient designs that include the latest in AI, video processing, low power communications and CMOS fabrication technology.
Key job responsibilities
- Built UVM based testbenches and components- Use and/or build bit accurate C models- Evaluate block and sub-systems for testability/verifiability- Write comprehensive block and system level testplans- Build assertions, traffic generators and scoreboards- Execute testplans and perform rigorous debug
- Bachelor's degree in Electrical Engineering or a related field
- Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing
- UVM Based testbench development
- Master's degree in Electrical or Communications Engineering or a related field
- Experience with formal verification techniques including abstraction and end-to-end checking
- Experience with industry standard tools and scripting languages (Python or Perl) for automation
- System Verilog coding and debug
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