Qualcomm Systems Design Engineer - Qualcomm Sophia 

France, Provence-Alpes-Côte d'Azur, Valbonne 

74195845

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Business Description and Job Function:

Qualcomm France-QITC develop interconnect for complex SoCs providing low power, higher system bandwidth, greater IP flexibility, fewer global wires and easier timing convergence as well as faster time to market than existing bus interconnects. QITC NoC solution includes a full suite of automated NoC Design Tools that improve designer productivity.

Responsibilities:

The engineer will be in charge of building and maintaining system level platforms for RTL simulation and FPGA Emulation. It includes the integration in systemVerilog of CPUs and infrastructure IPs such as interconnects or memory controllers. He will be responsible for designing RTL modules for the testbench such as traffic generators or DDR memory models coding in systemVerilog or C language (DPI-C). He will have to provide functional platforms by running and debugging integration and system level testcases. The engineer will also participate in mapping the full platform on various Emulators.

Skills and Experience:

Good RTL development skills: SystemVerilog/Verilog integration and design. RTL Simulation. debugging

Systems understanding: Bus Protocols, DDR, SOC.

Emulation methodologies knowledge

Additional Skills:

Python, C, C+Strong motivation and team spirit

Working environment: Linux, ModelSim

Educational Requirements:

Micro-electronics or similar Engineer Diploma

minimum 5-10 years experience

What's On Offer:

Apart from working in an open, relaxed and collaborative space, you will enjoy:

• Salary, stock and performance related bonus,

• Employee stock purchase scheme,

• Relocation and immigration support,

• Life, Medical, Income and Travel Insurance,

• Employee-managed clubs, including, running, music, biking, badminton and many more.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.