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Job Area:
Engineering Group, Engineering Group > ASICS Engineering
Qualcomm Interconnect Technology Center (QITC) has been breaking ground in interconnect design for 15 years by providing more efficient SoC NoC with faster time to market than existing bus interconnects and continues to innovate and deliver technology in line with the very latest evolutions in SoC design. Our work is at the backbone of the SoC, interconnecting all major IP solutions at Qualcomm.
As a NoC Architect, you will join a great team and play a pivotal role in shaping the architecture of complex on-chip communication networks. Your expertise in logic design, physical design, and low-power methodologies will be critical in achieving high-performance, energy-efficient systems.
Preferred Qualifications
Master's degree in Engineering, Information Systems, Computer Science OR PhD in Science, Engineering, or related field.
10-15 years of microelectronics definition and design, preferably in SOC NoC and in memory hierarchies.
Strong knowledge or understanding of data bus and coherency protocols such as CHI, AXI, AXI-stream, etc.
Good understanding of SoC Memory management architecture.
Good understanding of Security and Power Management challenges.
Some experience on CPU Soc Architecture, preferably ARM v8/v9 based would be appreciated.
Hands-on experience in design or performance estimation, experience with data analysis using Excel, Python, etc.
Self-driven, analytical, methodical and process oriented.
Teamwork spirit with excellent oral and written communication skills.
Ability to work in an international and multi-sites context.
Principal Duties And Responsibilities
Envision and define new architectures for our NoC technologies (arbitration algorithms, cache coherency management, transport protocols, sockets interfaces, etc.).
Collaborate across teams to understand, assess and anticipate the SoC performance requirements.
Write product requirements documents and architecture/micro-architecture specifications.
Work closely with design and verification teams to ensure proper implementation of defined architectures.
Level Of Responsibility
Requires decision-making and prioritization.
Requires negotiation, influence and tact skills.
Ability to provide supervision/guidance to others.
May require a moderate amount of influence over key organizational decisions.
What's on Offer
Friendly and collaborative working environment
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Life, Medical, Income and Travel Insurance
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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