Cisco Physical Design Engineer Co 

United States, Massachusetts 

741294843

Applications are accepted until further notice.

Please note this posting is to advertise potential job opportunities.This exact role may not be open today but could open in the near future.

Who You'll Work With

short time

The work is essential for supporting the increasing demands of hybrid work environments and ensuring reliable, high-capacity network connections.

The engineers work with technologies that involve the latest submicron technologies. An ASIC PD engineer would be involved in developing andphysical floorplan and their implementation.

What You'll Do

The Co-op may find themselves working in the following areas:

• optimalphysical implementation
• Gate level netlist synthesis (physical synthesis)
• Physical implementation (floorplanning, placement, CTS, routing)
• Power,performanceand area optimization of design
• Static Timing analysis and signoff closure
• Physical verification and signoff closure
• EMIR analysis and signoff closure

Who You Are

• Good interpersonal and organizational skills
• Passionate about engineering and enjoy working with hardware AND software
• Likes to be challenged to understand systems and figure out ways to break it
• Automation and programming minded
• Self-motivated, able to work independently whenrequired
• Collaborative and team-focused with thestrong desireto learn and grow
• Excellent English verbal and written communication skills

Minimum Qualifications

• Currently enrolled in a full-time undergraduate program in computer science, electrical engineering, or related program
• Must be able to be onsite in Maynard, MA two days a week
• Knowledge of the design cycle from RTL to GDSII
• Understanding of Static Timing Analysis, timing closure and design constraints
• Knowledge in block level synthesis, place and route, timing closure,PnRand signoff tools and their capabilities

Preferred Qualifications

• Interest in VLSI design, and more specifically in ASIC physical design and verification
• Interest and preferably academic experience in deep submicron CMOS technologies
• Scripting experience withperl,tcl, python and/or shell, a plus
• Analytical and creative, with well-developed and tenacious problem-solving skills
• Previousinternship experience

“old” (40 years strong) and only about hardware, but

But “Digital Transformation” is an empty buzz phrase without a culture that allows for innovation, creativity, and yes, even failure (if you learn from it.)