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What you’ll be doing:
Learning pioneering formal verification methodologies
Responsible for applying best-in-class formal methodologies on complex digital designs, IP blocks and SoCs
Taking ownership of verifying a design by developing a robust test plan
Implementing it by working with the design team
Coordinating with other verification team members for closure
What we need to see:
B.Tech. / M.Tech. with 1 - 3 years of relevant experience
Strong analytical skills to solve difficult problems.
Understanding of abstraction techniques for effective verification
Hands-on experience with HDLs such as Verilog / System Verilog
Ability to quickly understand RTL design
Understanding of temporal logic assertions
These jobs might be a good fit