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What you'll be doing:
Work with some of the best engineers to define verification strategies and execute plans at full chip level.
Build and continuously reform verification infrastructure and methodologies to meet the demands of next generation SoCs.
Work with architects, RTL designers, FPGA, emulation engineers to ensure that verification requirements are met for each project.
What we need to see:
Bachelors Degree in EE, CS or CE or equivalent experience.
5+ years of relevant experience in ASIC DV.
Exceptional analytical skills and problem solving skills.
Experience in crafting testbenches, methodologies for large and complex chips.
Deep understanding of verification concepts.
Proficiency with at least one of these - C++, Object Oriented Programming, UVM, System Verilog.
Familiarity with verification challenges in large scale designs.
Solid understanding of basic concepts of CPU or SoC architecture.
Experience with verification of SoCs with embedded processors or CPU verification.
Ways to stand out from the crowd:
Ability to handle complex and hard-do-solve problems in programming and verification.
Ambitious and dedicated with strong communication and interpersonal skills.
You will also be eligible for equity and .
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