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Apple SOC Verification Engineer United States, California, Sunnyvale 469542922
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Key Qualifications
- 3+ years of verification experience.
- Solid fundamentals in Verilog and System Verilog for verification.
- Basic knowledge of UVM methodology.
- Solid verification skills in problem solving and debugging.
- Experience with Constrained Random testing is a plus.
- Good understanding of overall verification flow.
- Knowledge of industry standard interfaces like I2C, UART, SPI.
- Understanding and usage of System Verilog Assertion (SVA)
- Programing experience in C
- Experience writing scripts in languages such as Perl or Python a plus.
- Should be great teammate with excellent communication skills and desire to take on diverse challenges.
Education & Experience
BS+ 3 years of relevant industry experience. MS preferred.
Additional Requirements
- Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $138,900.00 and $256,500.00, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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