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Intel CPU RTL Design Engineer 
United States, Texas 
731051272

08.04.2025

Who You Are

Your responsibilities may include, but are not limited to:

  • Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
  • Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
  • Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
  • Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
  • Documents micro architectural specs (MAS) of the CPU features being designed.
  • Supports SoC customers to ensure high quality integration of the CPU block.

The ideal candidate will exhibit the following :

  • Excellent written and oral presentation skills, and willing to work across multiple organizations and geographies.
  • Effective team player with continuous learning mindset.
  • Strong analytical and problem-solving skills.
  • Be willing to balance multiple tasks
  • Self-starter with a collaborative spirit, comfortable asking for help when needed.
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelors in Computer Engineering or Electrical Engineering with 6+ years of experience
  • OR Masters degree in Computer Engineering or Electrical Engineering with 4+ years of experience.
  • Your experience in following area:
    • Experience in high-performance, lower-power CPU design.
    • Experience in Cache/Memory subsystem design and computer architecture, RTL Verilog, V2K, or System Verilog with a working knowledge of hardware modeling issues and logic design and debug skills, Timing convergence
    • Proficient with static timing analysis, UPF and lint checks.
    • Experience in Scripting in an interpreted language (e.g. TCL, Perl, Python, Ruby).

Preferred Qualifications:

  • Experience in Modernenergy-efficient/low-powerlogic design techniques, including those specifically applicable to high frequency optimization
  • Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
  • Experience with high speed circuit design and optimization for data path, circuits and/or arrays.
  • Knowledge of circuit planning and timing convergence.
  • Knowledge with x86 memory management
Experienced HireShift 1 (United States of America)US, Oregon, HillsboroUS, Texas, Austin
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US: