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Google SoC Physical Design Engineer United States, California, Sunnyvale 728871065
17.06.2024
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience with physical design flow such as floor planning, place and route, or physical verification.
- Experience in physical design areas such as synthesis, place and route, STA, formal verification, or power analysis.
Preferred qualifications:
- Experience scripting in Python, Tcl and/or Perl.
- Experience in ASIC physical design, physical design flows and methodologies.
- Experience in IP integration (e.g., memories, IO’s and Analog IP).
- Knowledge of semiconductor device physics and transistor characteristics.
- Knowledge of Verilog/System Verilog.
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