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Apple SoC Physical Design Engineer 
United States, California, Sunnyvale 
588580800

18.11.2024
Minimum Qualifications
  • Minimum BS and 10+ years of relevant industry experience.
  • Familiar with aspects of ASIC integration including floorplanning, clock and power distribution, global signal planning, I/O planning, and hard IP integration.
  • Experience with scripting and programming skills, ability to write maintainable and reusable scripts/programs of medium complexity in suitable languages (TCL/Python).
  • Understanding of industry standard tools for PNR, Voltage Drop Analysis, STA & Layout Verification.
Preferred Qualifications
  • Experience with automation for Physical Design, for block level execution, using tcl and/or python.
  • Experience of cross-functional collaboration with CAD/Physical Verification/Electrical analysis and PNR Teams to ensure electrically robust power grid.
  • Experience with latest technology nodes tapeout is a plus.
Pay & Benefits
  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200, and your base pay will depend on your skills, qualifications, experience, and location.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.