Microsoft Principal Timing/STA Engineer 

Taiwan, Taoyuan City 

712721160

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partnersengineers to help achieve that mission.

the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, theand sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions,and industry knowledge to envision and implement future technical solutions that will manage andthe Cloud infrastructure.

Principal Timing/STA Engineerto join the team.

Required Qualifications:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • OR Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • ORequivalent experience.
• 8+ years of experience in Physical Design, specifically Static Timing Analysis and Convergence domains.
• 8+ years of experience in STA methodologies including timing constraints, timing sign off, timing convergence ECO strategies, timing integration at SOC level and timing correlation.

Other Requirements:

to meet Microsoft, customer and/or government security screening requirementsrequired for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will beto pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate willbe requiredto provide either proof of their country of citizenship or proof of their. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications:

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience
  • OR equivalent experience.
• Proven technical leadership with soft skills of leading a small team.
• Proficient in parasitics extraction, modeling and debug.
• Hands on experience in EDA vendor tools such asSynopsys Primetime, TCM, PrimeClosure, Fusion Compiler, Star-RC; Cadence Innovus

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $139,900 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Microsoft will accept applications for the role until July 17th, 2025.

• Lead the STAmethodologydevelopment and execution to meet timing closure targets for complex semiconductor designs.

• methodology.

• Conduct timing analysis and sign-off for critical paths, setup/hold violations, and multi-mode/multi-corner scenarios.

• Develop and implement timing closure strategies to meet performance, power, and area targets.

• optimizedesign performance, and meet project milestones.

• Stay current with industry trends and emerging technologies to continuously improve STA methodologies and processes.