Nvidia Manager Signal Power Integrity Engineering 

Taiwan, Taipei 

709999716

What you'll be doing:

• Lead a SI team to drive board/system SI/PI design activities, including PCB stackup/material selection, design guide implementation, layout review, and post-layout analysis

• Be both a technical and managerial leader, establish team objectives and ensure SI/PI deliverables

• Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysis

• Develop novel algorithms & new methodologies to improve SI/PI modeling efforts

• Work with Application Engineering teams to support customers w/ SI/PI questions

• Improve and optimize work procedures, mentor and coach team members

What we need to see:

• MS/BS in EE or equivalent experience

• 8+ years of experience in SI/PI engineering; 3+ years of technical lead/management experience

• Deep understanding of electromagnetics, specifically electromagnetic waves including transmission line theory and via properties

• Proficient with HFSS, Sigrity, Hspice, and/or other simulation tools

• Experienced with Cadence Allegro PCB designer and Constraints Manager

• Understanding of high volume manufacturing variations and impact to channel signal integrity

• Exposure to lab measurements including VNA & TDR experience

• Passionate about SI/PI work; Excellent verbal, written, and communications skills

Ways to stand out from the crowd:

• Exposure to interface timing budgets and system modeling

• PDN analyses including model generation and time domain simulation

• Experience w/ Matlab, Python, and C

• Exposure to package design