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Job Description:
As a Senior Physical Design Engineer, the ideal candidate will be responsible for the 3nm high speed physical designs. You will be directly involved in:
· Floorplanning including multi-power domain, PG planning etc.
. Physical implementation of blocks and top-level including clock-tree.
· Physical verification and timing closure for block and chip-level.
. Static and dynamic IR drop analysis, signal and power EM checks.
· Methodology & Flow development of Physical Design and Timing Closure.
BE plus 8+ years, or ME plus 6+ years, in deep-sub-micron IC physical designs, or equivalent experience
Experience with TCL and Perl, to achieve higher productivity, is desired
Compensation and Benefits
The annual base salary range for this position is $119,000 - $190,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
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