Intel Sr Timing Signoff Methodology Lead- Principal Engineer 

United States, Texas 

694172448

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:
�Bachelor's degree in Electrical / Computer Engineering, Computer Science or in a STEM related field of study.
�10+ years of timing verification experience.
Preferred Qualifications:
�Master's degree
�10+ years STA hands on experience.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and orschoolwork/classes/research.

Experienced HireShift 1 (United States of America)US, California, Santa Clara, US, Massachusetts, Beaver Brook, US, Texas, Austin
Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 05/14/2025