Nvidia Senior HSIO Validation Methodology Engineer 

China, Shanghai 

675377335

Our ArchDev arm is a hub for all silicon and system level feature development, cost-benefit analysis, system integration solutions, and system POR alignment. As a member of this team, you will evaluate next gen silicon and define methodology, design, SW/FW, tool requirements needed for HW validation. The work you do will directly benefit the quality of NVIDIA products.

What You'll Be Doing:

• Lead NVIDIA Product GPU/CPU/SOC IP/system level validation strategy, characterization and tuning methodology, platform/component interoperability, debug capability and tools/scripts, system, SLT, and manufacturing test requirement and lead cross-function teams (ASIC, SW, FW, Board, PHY, SI/PI etc) for development and implementation.

• Lead new feature silicon bring-up, validation, and debug, and coordinate product schedule to release feature with high quality at aggressive schedule.

• Deep dive into technically challenging High-Speed IO Pre-Si and Post-Si bugs and lead debug efforts across various teams(ASIC/FW/SW/PHY/board)to fix the issue on schedule and envision design optimization and collaborate with designer to implement for next generation.

• Proactively drive andidentify opportunities and methodsoptimization and innovationfortest strategies, process and workflow, validation methodology and efficiency based on project learnings and challenging.

What We Need To See:

• BS or MS degree in Electrical/Computer Engineering or equivalent experience.

• 8+ years working in HSIO development, bringup planning, HSIO SerDes, protocol, functional and electrical validation, SI/PI, and/or power optimization.

• Experience with HSIOs likePCIE/CXL/USB/UFS/MGBEetc or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity on BER.

• Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, and scripting.

• Working experience on Pre-Si/FPGA and Post-Si validation, debug, rooting cause and fixing against product needs.

• Deep understanding of OS/firmware/driver structures and their interaction with HW.

• Hands on experience with Lab test and measurement equipment.

• Effective collaboration and communication, presentation skills across different functional teams.