Microsoft Senior SoC HW Analog/Functional Validation Engineer 

Taiwan, Taoyuan City 

668801088

Required/minimum qualifications

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
• 4+ years of experience in SoC subsystem, SoC system level, and platform level functionality and writing scripts/software with industry standard languages like Python or C/C++.

Other Requirements:

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
  

Additional Preferred Requirements:

• Proficient communication, collaboration, and teamwork skills, with the ability to lead, grow, and contribute to diverse and inclusive teams

• Experience in verification, logic development, analog validation, or validation tools as part of a CPU, SoC, and/or IP development team

• Leadership skills

• Demonstrated validation expertise in one or more of the following areas:

  • Electrical validation: SerDes, IO, high-speed interconnects, analog circuits

  • Power and performance validation

  • Automation, content creation, or tools/scripts development

• Ability to develop synthetic SoC validation content for Core, Coherency, Memory, and IO, to run on both bare-metal and OS environments

• Ability to develop sophisticated tools/scripts to support SoC validation and debug activities, including:

  • Maximum power analysis

  • Current transient measurements

  • Register dumps

• Understanding of board-level schematics

• Understanding of system-level software and firmware

• Experience running silicon content on pre-silicon platforms such as emulation or FPGA

• Demonstrated success in hardware/software debug efforts

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:Microsoft will accept applications for the role until July 25th, 2025.

• Own post-silicon validation of one of the following areas:

• • IO electrical/analog

  • Functional IO interfaces

• Define, guide, and contribute to the implementation of silicon debug tools and capabilities

• Become an expert in high-speed IO interfaces (e.g., PCI, CXL), including:

  • Their architecture and implementation

  • Interaction with other SoC components, the platform, and software

• Provide technical guidance, coaching, and mentorship to other engineers

• Develop validation strategy, requirements, environments, tools, and methodologies

  • Including debug board and hardware/software requirements

• Write and implement test plans using:

  • Validation principles and techniques

  • Test content, scripts, tools, and collateral

• Execute test content in post-silicon environment; triage and debug failures

• Apply a growth mindset to learn and adapt in a dynamic environment

• Collaborate with partners to improve design, validation plans, and methodology

  • Aim to detect bugs earlier, more reliably, and efficiently

• Embrace a One Microsoft approach by collaborating with:

  • Architects, logic designers, verification engineers

  • Other post-silicon validators, IP and tool providers

• Deliver high-quality results on schedule to satisfy customer expectations

• Provide technical leadership with respect and integrity

• Contribute to pre-silicon verification planning, testing, and debugging in your area