Qualcomm Mixed-Signal SerDes PHY IP Design Verification Engineer - Cork 

Ireland, Cork 

641663711

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Responsibilities will include:

• SV/UVM based Design Verification of SerDes Mixed-Signal PHY IP

• Work closely with analog and digital front-end design teams to verify analog mixed-signal and RTL designs in next-generation SerDes PHY designs

• Interact with architecture, design, physical design, software, test and SoC teams to verify and integrate SerDes PHY IP designs into the latest Qualcomm Snapdragon products

Skills And Experience We Would Love To See:

• Bachelor's degree in Engineering, Computer Science or related field.

• Experience in design and verification of hardware and software on SoCs and SoC/IP Methodologies for verifying complex units on IP/SoC using industry standard tools and technologies

• Knowledge in developing unit and SoC/IP level test benches using VMM/OVM/UVM.

• Constrained random functional verification environment in System Verilog/UVM with excellent debugging skills.

• Experience in Low power verification using UPF at RTL and GLS simulation level.

• Experience in Power Aware Gate Level Simulation (GLS) verification flow with zero delay and SDF annotated simulation.

• Experience of pre and post-silicon verification testflow and automated test benches. Post silicon ATE/PTE vector bringup and bench characterization support.

• Knowledge of test-plan development, coverage(code/functional) analysis, transaction level modelling, constrained random verification, assertion based and formal verification techniques with System Verilog

• Experience with Verilog, SystemVerilog, Assertions, Python/TCL/Perl/shell-scripting.

• Experience in analog mixed signal verification techniques will be a plus.

• Excellent communication skills

Where you will be working

A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

What's on Offer

Apart from working in an open, relaxed and collaborative space, you will enjoy:

• Salary, stock and performance related bonus

• Maternity/Paternity Leave

• Employee stock purchase scheme

• Matching pension scheme

• Education Assistance

• Relocation and immigration support (if needed)

• Life, Medical, Income and Travel Insurance

• Subsidised memberships for physical and mental well-being

• Bicycle purchase scheme

• Employee run clubs, including, running, football, chess, badminton + many more

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.