Intel SOC Design Engineering Intern 

Vietnam, Thu Duc City 

63597007

Who You Are

Your responsibilities will include but not be limited to:

• Block-level floor planning.

• Exploring new AI tools or flows to aid in SOC convergence.

• Auto Place-and-Route (APR) using Synopsys/Fusion or Cadence/Innovus tools.

• Timing verification using Synopsys Prime Time

In addition to the qualifications listed below, the ideal candidate will also have the following:

• Excellent communication skills

• Teamwork

• Strong analytical and problem-solving skills

Minimum Qualifications:

Able to work onsite for 3-4days per week.

Good English communication.

3+ months of experience/coursework with:

• CMOS transistor level circuit fundamentals

• VLSI hardware design and programming

Preferred Qualifications:

3+ months experience with:

• RTL/Logic design Verilog

• Electronic Design Automation tools, flows and methodology.

• Design Compiler, Fusion, Primetime, Innovus

• Layout cleanup DRC, LVS.

• Circuit design

• TCL, Perl and/or C++ programming.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits