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Apple Wireless Design Verification Engineer United States, Oregon, Beaverton 593592260
02.05.2024
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Key Qualifications
- Significant experience verifying complex IP with a track record of robust ASICs
- Experience verifying Wireless or Digital Signal Processing (DSP) systems is significantly valued. Exposure to digital-radio and PLL controllers is a plus
- Advanced knowledge of ASIC verification flows with SystemVerilog and UVM
- Experience developing testbenches from scratch, bringing up designs in simulation
- Skills with constrained random testing, coverage closure, and RTL simulations
- Proficient in a scripting language such as Python, Perl, Bash or similar
- Phenomenal teammate with excellent communication skills and the desire to seek diverse challenges
- Knowledge of a wireless protocol valued, e.g. Wi-Fi / IEEE 802.11, Bluetooth or LTE
Description
This role will empower you to lead critical block or sub-system verification of PHY and/or Radio Controller (digital), and architect and develop testbenches and environments. You will create, simulate and debug test scenarios, and lead regressions and issue tracking. There will be collaboration with design and systems engineering teams to review specifications and architecture, extract features, and define verification plans. You'll drive coverage analysis and closure, and collaborate with / support digital + mixed-signal co-simulations using SystemVerilog analog behavioral models.
Education & Experience
BS + 10 years of relevant experience required.
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