Microsoft Senior Engineer Debug Logic 

India, Karnataka, Bengaluru 

585635946

engineers to help achieve that mission.

is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery,and industry knowledge to envision and implement future technical solutions that will manage andthe Cloud infrastructure.

• Experience in designing debug/diagnostics logic. Includes building and integrating any of the Debug IPs such as the ones provided by ARMCoresight

• Highly Proficient in Verilog/System Verilog coding constructs& good withscriptingusing Python etc

• nowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting)

• Strong understanding in clock crossing techniques & UPF (Low power intent).

• experience working on post-silicondebug/ validation.

• Familiarity with Industry standard interface protocols is a plus.

• Familiarity with Synthesis and STA tools is a plus.

• Good verbal and written communication skills.

In this high impact role on the team, your responsibilities will include:

• Define the micro-architectural implementation spec for debug blocks/fabrics & implement the micro-architectural specification in Verilog or System Verilog.

• sess and then refine the implementation for debug coverage, area,powerand performance. Ensure quality with checks covering Lint, CDC, Low Power intent and more.

• Exercise the functionality of the block by writing basic tests and debug for various features at IP and SoC levels asdeemed

• (system architects, front-end & back-end design verification, and post-sivalidation folks)with respect and with One Microsoft mentality toestablish

• by deliveringcutting-edgedebug infrastructure for custom SoC designs that can perform complex and high-performance functions.Challenge the status quo withgrowth