Microsoft Principal Validation Engineer 

Taiwan, Taoyuan City 

577443942

Principal Validation Engineerwith expertise in one or more of the following validation domains: functional, electrical, high speed interfaces, memory, power/performance, debug/BU and tool development.

You will be part of the Post-Silicon Validation team in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon Org.

Required Qualifications:

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • OR equivalent experience.
• 5+ years of experience in Computer Architecture and SoC validation principles, including:
  • Broad understanding of SoC subsystem, SoC system level, and platform level functionality
  • Writing scripts/software with industry standard languages such as Python or C/C++.
• 4+ years ofexperience in drivingPost-Siliconvalidation and characterization and successful execution.

Other Requirements:

to meet Microsoft, customer and/or government security screening requirementsrequired for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will beto pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate willbe requiredto provide either proof of their country of citizenship or proof of their. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable

and every two years thereafter.

Preferred Qualifications:

• Demonstrated success in running cross-disciplinary taskforces.
• Verification, logic design or validation experience as part of a CPU, SoC and/or IP development team.
• Leadership skills.
• Experience with high-speed IO (ethernet, PCIe).
• Understanding of board level schematics.
• Understanding of system level software and firmware.
• Demonstrated success in hardware/software debug efforts.
• Communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams.
• Hands on expertise debugging silicon failures using on chip debug features (e.g., trace or JTAG) as well as test equipment (e.g., protocol analyzers, bit error rate testers, logic analyzers, high speed oscilloscopes).
• Experience with FPGA design and verification and knowledge of prototyping platforms.
• Hands on experience with validation for multiple product cycles from definition to Silicon, including writing test plans, developing tests, debugging failures and developing tools for pre-silicon and post-silicon environments.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:Microsoft will accept applications for the role until October 13, 2025.

• Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
• Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools, and other verification collateral
• Execute content in post-silicon, triage, and debug failures
• Apply your growth mindset to learn and adapt in a complex and dynamic environment
• Engage with partners to drive continuous improvement to design, validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
• Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
• Collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers
• Delight your customers by providing high quality results on schedule
• Provide technical leadership with respect and integrity
• Apply your expertise towards pre-silicon verification plans, tests, and debug of your area