Nvidia Silicon Validation Engineer 

United States, California 

576278638

Our ArchDev arm is a hub for all silicon and system-level feature development, cost-benefit analysis, system integration solutions, and system POR alignment. As a member of this team, you will define the validation methodology, design, SW/FW, and tool requirements needed for HW validation and bring up next-gen silicon. Your work will directly benefit the quality of NVIDIA products.

What you'll be doing:

• Develop new end-to-end methodologies, processes, and workflows targeting system-level silicon stress, concurrency, and PVT coverage.

• Lead debug efforts from the HW side to root cause feature sequences bugs, silicon bugs, and sophisticated system-level issues caused by interactions between multiple HW and SW features.

• Bringup new flows, tests, and PVT solutions.

• Apply insights from bring-up execution and post-action reviews to continually improve coverage.

What We Need to See:

• BS or MS degree in EE/CE or equivalent experience

• Effective in a collaborative environment.

• 8+ years of experience in some of the following areas:

• Developing end-to-end silicon validation and stress testing, PVT methodologies for next-generation silicon

• Deep understanding of GPU/SOC system-level architecture

• Working experience with silicon active and low power features, boot, binning, PVT sensitivity, platform component losses

• Post silicon debug and evaluate fix options against product needs.

• Effective collaboration and communication across different functional teams.