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Apple Design Verification Engineer United Kingdom, England, Cambridge 539534027
06.03.2025
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Description
Use SystemVerilog, UVM and C++ with industry leading simulation tools and methodologies to verify complex GPU designs.Develop verification plans in coordination with design leads and architectsCreate and maintain verification test bench components and environmentsGenerate directed and directed random testsRun simulations and debug design and environment issuesBuild functional coverage points, analyze coverage, and improve test environment to target coverage holesBuild automated verification flows for block verification
Minimum Qualifications
- Fluent in English
Preferred Qualifications
- Work with other block and core level engineers to ensure seamless verification flow
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