Microsoft Principal Foundry Technologist 

United States, Texas, Austin 

468292072

Required/Minimum Qualifications

• 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
• 8+ years of experience in semiconductor process development and manufacturing.
• 5+ years of experience in and technology evaluation, testchip and modeling
• 5+ years of experience in device physics, foundry design collateral, process qualification, broad fabrication process experience, device reliability, statistical analysis, yield improvement, and physical failure analysis techniques.
• 5+ years of experience in Testchip design experience including test structure definition, schematics and layout design, SPICE simulation, functional verification and test implementation

Other Requirements

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications

• Experience with device-level measurements and associated test equipment, data analysis, modeling, simulation, targeting and projection
• Probability and statistics background, including DOE’s
• Experience inLeading cross-functional teams and understands program/project management.
  • Proficient in product yield/performance analysis, and design technology co-optimization.
  • Model based problem-solving skills through data analysis and understanding of SOC design features, FAB process interactions and test methodology.
  • EDA tools from Cadence, Synopsys, Siemens for device and IP study.
  • Proficient in data analysis tools like excel, JMP, etc.
  • Custom process and custom library development
  • Product and test engineering, and ATE test program methodologies
  • SPICE model development
  • Analog design with automation and script; proficient with latest mixed-signal design flows and tools
  • Digital design knowledge in floor planning, STA; taking RTL to GDS and optimize for PPA
• Knowledgeable in
  • Coding using various languages including but not limited to Python, Java and C++.
  • Leveraging and designing/optimizing AI/ML.
  • DFT and DFM techniques.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:Microsoft will accept applications for the role until August 15, 2024.

• Responsibe for leading technical interactions with external foundries both in pre-silicon design and post silicon development as well as continuous improvement for Yield and performance during porduciton manufacturing stage to ensure Best-in-class Microsoft first-party and second-party silicon.
• Responsible for defining and designing engineering structure in testchip for technology interception and enablement including data collection, analysis and model-silicon characterization.
• Compile and analyze data using common statistical techniques and effectively present key results along with recommended actions; practice continuous improvement and yield optimization and analyze products to ensure manufacturability and data sheet compliance
• Provide comprehensive Power, Performance, Area and Cost analysis for technology enablement.