ARM Staff Design Verification Engineer – Memory Controller 

United States, Texas, Austin 

467454854

Arm System IP enables designers to build Arm AMBA systems that are high performance, power efficient and reliable. Configurable for many different applications, System IP is the right choice for your system whether it is a high-efficiency IoT endpoint or a high-performance server SoC.

As a Design Verification Engineer, you would responsible for one or more functional units of the Memory Controller while working closely with performance modeling, validation, and implementation teams to meet all functional requirements and performance, power, area (PPA) goals.

• Develop SystemVerilog/UVM testbenches for unit level focusing on Memory Controller verification.
• Build and maintain detailed verification plans.
• Generate and run test cases on logic simulation models.
• Debug functional errors in the RTL model using simulation and debug tools with an in-depth understanding of the microarchitecture.
• Define and implement functional coverage.
• Promote and demonstrate the Arm Core Beliefs and Behaviors.

• Bachelor’s or Master’s degree in Computer Science or Electrical/Computer Engineering - 7+ years experience in microprocessor, SoC, memory controller and/or interconnect IP design and verification
• Proficiency in scripting languages such as Python or Perl.
• Knowledge of assertion-based languages such as SystemVerilog Assertions
• Experience with CPU or compute subsystem memory micro-architecture

• Knowledge of DRAM specification (e.g., LPDDR4/5, DDR4/5, HBM)
• Knowledge of bus protocols (e.g., AMBA5 CHI, AMBA4 ACE or AXI)
• Processor system knowledge including basic understanding of SoC systems as well as operating system software