What You'll Do
- You will author design specifications and participate in micro-architecture specification reviews.
- Implement Verilog RTL to meet timing, performance, and power requirements
- Contribute to full chip integration and timing methodology / analysis
- Develop and analyze functional coverage.
- Collaborate with the verification team to address design bugs and close code coverage.
- Work closely with physical design team to close design timing and place-and-route issues.
- Triage, debug, and root cause simulation, software bring-up, and customer failures.
- Perform diagnostic and post silicon validation tests in the lab.
Who You'll Work With
You will work with exceptional talent with vast ASIC design and development expertise.
Minimum Qualifications:
- Bachelor’s degree in Electrical or Computer engineering.
- 4+ years of ASIC Design experience.
- Excellent Verilog/System Verilog programming skills.
- Possesses interactive and waveform debug skills.
- Good written and verbal communication skills.
- Collaborative and team-focused with the commitment to learn and grow.
Preferred Qualifications:
- Master's degree in Electrical or Computer Engineering
- Scripting experience (Python, Perl, TCL, shell programming)
- Experience with Synopsys Design Constraints (SDC)