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Qualcomm Sr Staff Design Engineer Low Power 
United States, California 
445994816

23.06.2024

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

As a key member of a fast paced Integrated Wireless Technology team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates and power reduction techniques.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Preferred Qualifications:

  • 7+ yrs. of working experience in ASIC Design

  • 3 years of experience in low power micro-architecture, Design, Power Intent/Implementation, power optimization and power estimation

  • Experience in silicon bring up and debug is a must

  • Required experience on SoC micro architecture, multi-domain clocking, AMBA bus protocols such as AHB and APB. AXI is preferred

  • Experience in PCIE/USB peripherals is preferred

  • Experience in CPU sub system-based design is preferred

  • Experience in low power design from project start to volume chip production for atleast one product cycle is preferred

Principal Duties and Responsibilities:

  • The candidate will be responsible to develop technical specifications from Architectural and systems requirements and deliver detailed low power micro-architecture and design.

  • Also work closely with verification team to develop verification plans and actively participate in debug phase.

  • The candidate will work hands-on and own their design through the full ASIC development process from specification, RTL implementation, verification, synthesis, timing closure, emulation and post silicon bring up.

  • The candidate is also responsible for the silicon power measurements, Si debug and power correlation.

  • Experience in SoC low power micro-architecture, low power design and methodology, Power Intent/Implementation, power estimates, power analysis tools and power reduction techniques is a must.

Level of Responsibility:

• Provides supervision/guidance to other team members.

• Decision-making is significant in nature and affects work beyond immediate work group.

• Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc.

• Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).

• Tasks do not have defined steps; planning, problem-solving, and prioritization must occur to complete the tasks effectively.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$165,000.00 - $247,000.00