Amazon Sr Design Verification Manager Annapurna Labs 

United States, California, Cupertino 

443169661

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.Key job responsibilities
- Overall verification manger, driving multiple teams to ensure correctness and quality of our ML accelerator SOC
- Develop and execute detailed verification strategies and plans to validate functionality, performance of ASIC designs
- Directly manage the verification organization, responsible for all aspects of people management
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.About AWSWork/Life Balance
Mentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

- 8+ years of hands-on experience in ASIC/VLSI design verification, with a strong understanding of verification methodologies such as UVM, along with industry best practices
- 8+ years managing verification teams, 4+ years of experience with multi level management
- Expertise in various verification languages and tools such as SystemVerilog, UVM, Verilog, and simulation/emulation platforms
- Proven track record of leading successful ASIC verification projects from planning to tapeout
- Strong analytical and problem-solving skills, with the ability to quickly identify and troubleshoot complex design issues

- Previous knowledge with Machine learning acceleration SOC architecture
- Higher level degree in computer science or electrical engineering
- Hands on experience with front-end logic design