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Amazon Sr Physical Design Verification Engineer Annapurna Labs 
United States, California, Cupertino 
655427208

03.08.2025
DESCRIPTION

Key job responsibilities
- Define, execute and optimize next-generation physical verification and integration methodologies using industry-standard EDA tools (Calibre, IC Validator)
- Drive chip level physical verification sign-off and closure
- Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification, and Fill insertion- Interface with foundries for rule deck updates and violation waivers
- Develop and maintain verification runsets and methodologies
- Support technology file development and qualification
- Fine tune cloud infrastructure to improve compute and storage utilization for physical design work.
- Mentor junior engineers on physical verification methodologies and closureAbout the teamDiverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.
About AWSInclusive Team CultureWork/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

BASIC QUALIFICATIONS

- BS + 10yrs or MS + 7yrs in EE/CS, or related field
- 5+ in physical verification for advanced technology nodes
- Expert knowledge of industry-standard physical verification tools (Calibre, IC Validator, PVS)
- Strong understanding of semiconductor manufacturing processes and design rules
- Experience with scripting languages (Perl, Python, Tcl)
- Proven track record of successful tape-outs
- Strong communication and collaboration abilities
- Design Flow Knowledge: Understanding of backend physical design flows (FC/Innovus)


PREFERRED QUALIFICATIONS

- Experience with integration and verification in advanced nodes [5nm or below]
- Knowledge of custom and digital design flows
- Expertise with DFM (Design for Manufacturing) methodologies
- Expertise in reliability verification (ESD, EM, IR drop)
- Background in layout design or custom IC development
- Meets/exceeds Amazon’s leadership principles requirements for this role