Each designer is responsible for the functionality and quality of their designs and insuring that they work correctly in the overall system.
The candidate should have expertise in some (or preferably all) of the following areas:
- Very high speed analog design
- Very high speed custom digital design
- Ultra-low jitter clocking design
- SerDes architectures and modeling
Specific duties could include, but are not limited to, designing complex, high performance analog & custom mixed-signal circuits, modeling (verilog, veriloga, Matlab, Py), simulation (verilog, spice, and mixed-mode), validation, optimization, documentation, layout and debug of such devices in 7nm/5nm/3nm process technologies.
Qualifications- Bachelor/Master/PhD in EE
- Experience with high performance FET-level analog or mixed-signal design.
- Experience with state of the art CMOS SerDes design techniques, circuits and approaches
- Strong communication and teamwork skills
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.